;==============================================================================
;	Solar OS - RealTime Operating System
;	Copyright (c) 2001-2004 Ontanu Bogdan Valentin
;	All rights reserved.
;	Bucuresti, Romania
;	Bd. Eroilor Sanitari nr 73B, suite 2
;	www.oby.ro
;	email : bogdanontanu@yahoo.com
;
;	This program is free software; you can redistribute it and/or
;	modify it under the terms of the GNU General Public License
;	as published by the Free Software Foundation; either version 2
;	of the License, or (at your option) any later version.
;
;	This program is distributed in the hope that it will be useful,
;	but WITHOUT ANY WARRANTY; without even the implied warranty of
;	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;	GNU General Public License for more details.
;
;	see file LICENSE.TXT for details
;
;	You should have received a copy of the GNU General Public License
;	along with this program; if not, write to the Free Software
;	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
;
;===============================================================================


;==========================================
;
; DMA Stuff 
;
;==========================================

;--------------------------------------
; DMA Mode Register:  0Bh
;--------------------------------------
;        bit 7 - 6 = 00 Demand mode
;                  = 01 Signal mode
;                  = 10 Block mode
;                  = 11 Cascade mode
;
;
;        bit 5 - 4 = 0  Reserved
;
;        bit 3 - 2 = 00 Verify operation
;                  = 01 Write operation
;                  = 10 Read operation
;                  = 11 Reserved
;
;       bits 1 - 0 = 00 Select channel 0
;                  = 01 select channel 1
;                  = 10 select channel 2
;                  = 11 select channel 3
;
;       USE: Tell the DMAC what to do. Common modes are:
;
;            48h (Read operation, Signal mode)
;                Used to read data from host memory and send to whomever
;                polls it.
;
;            44h (Write operation, Signal mode)
;                Used to write data taken from a device to memory.
;

;-------------------------------------------
; location of
; low memory, non crossing of 64k boundry
; memory buffer for FDD DMA operations
;-------------------------------------------
offset_dma2_buffer	EQU	2000h



;----------------------------------------------------------------------------------
; Lookup table for DMA controller ports 
;----------------------------------------
; TODO: use this later
;----------------------------------------------------------------------------------
;		Channels:	0000  0001  0002  0003  0004  0005  0006  0007
;----------------------------------------------------------------------------------
dma_mask_ports		db	00Ah, 00Ah, 00Ah, 00Ah, 0D4h, 0D4h, 0D4h, 0D4h

dma_mode_ports		db	00Bh, 00Bh, 00Bh, 00Bh, 0D6h, 0D6h, 0D6h, 0D6h

dma_clear_ports		db	00Ch, 00Ch, 00Ch, 00Ch, 0D8h, 0D8h, 0D8h, 0D8h

dma_low_page_ports	db	087h, 083h, 081h, 082h, 08Fh, 08Bh, 089h, 08Ah
dma_high_page_ports	dw	487h, 483h, 481h, 482h, 48Fh, 48Bh, 489h, 48Ah	

dma_offset_ports	db	000h, 002h, 004h, 006h, 0C0h, 0C4h, 0C8h, 0CCh
dma_count_ports		db	001h, 003h, 005h, 007h, 0C2h, 0C6h, 0CAh, 0CEh


;============================================
; Specific setup DMA2 for floppy only
;============================================
Setup_DMA2_Read PROC STDCALL
	
;-----------------------------
; mask channel 2
;-----------------------------
	mov     eax,4
	add     eax,2
	out     0Ah,al          
;------------------------------
; clear pointers
;-------------------------------
	xor	eax,eax
	out	0Ch,al          ; clr byte ptr

;-------------------------------
; setup mode of operation
;--------------------------------
	mov	al,44h		; read from device and WRITE to memory
	add	al,2		; add device nr
	out	0Bh,al          ; set mode reg

;---------------------------------------
; set page low register
;---------------------------------------
	mov	edx,081h
        mov	eax,offset_dma2_buffer
	shr	eax,16
;	and	eax,3
	out	dx,al           ; set DMA page reg
;---------------------------------
;  setup offset addr
;---------------------------------         
	mov	edx,04
	mov	eax,offset_dma2_buffer
	and	eax,0FFFFh
	out	dx,al		; set base address low
	mov	al,ah
	out	dx,al		; set base address high
;-----------------------------
; setup length
;-----------------------------
	mov	eax,512
	dec	eax		; length-1
	mov	edx,05
	out	dx,al		; set length low
	mov	al,ah
	out	dx,al		; set length high

;-------------------------------
; unmask channel 2
;-------------------------------
	mov	al,2
	out	0Ah,al          ; unmask (activate) dma channel


        ret
ENDP

Setup_DMA2_Write PROC STDCALL
;-----------------------------
; mask channel 2
;-----------------------------
	mov     eax,4
	add     eax,2
	out     0Ah,al          
;------------------------------
; clear pointers
;-------------------------------
	xor	eax,eax
	out	0Ch,al          ; clr byte ptr

;-------------------------------
; setup mode of operation
;--------------------------------
	mov	al,48h		; write to device and READ from memory
	add	al,2		; add dma device nr
	out	0Bh,al          ; set mode reg

;---------------------------------------
; set page low register
;---------------------------------------
	mov	edx,081h
        mov	eax,offset_dma2_buffer
	shr	eax,16
	and	eax,3
	out	dx,al           ; set DMA page reg
;---------------------------------
;  setup offset addr
;---------------------------------         
	mov	edx,04
	mov	eax,offset_dma2_buffer
	and	eax,0FFFFh
	out	dx,al		; set base address low
	mov	al,ah
	out	dx,al		; set base address high
;-----------------------------
; setup length
;-----------------------------
	mov	eax,512
	dec	eax		;length-1
	mov	edx,05
	out	dx,al		; set length low
	mov	al,ah
	out	dx,al		; set length high

;-------------------------------
; unmask channel 2
;-------------------------------
	mov	al,2
	out	0Ah,al          ; unmask (activate) dma channel


        ret
ENDP